1. Field of the Invention
The present invention relates to analog circuit design. In particular, the present invention relates to a linear broadband PNP amplifier with a low output common mode voltage.
2. Discussion of the Related Art
There is a need for a DC-coupled differential amplifier with an output common-mode voltage that is below 1 V. Fast and linear pipe-lined analog-to-digital converters (ADCs) built with fine-line CMOS technologies operate at low power supplies (e.g., Vdd=1.8 V). For best dynamic range, the input voltage to such an ADC should be set at half supply (i.e., 0.5×Vdd or 0.9 V). Differential amplifiers used as ADC drivers are generally built using SiGe technology and typically use only NPN transistors as their active elements. In its linear region, such a transistor requires a base-to-emitter voltage (Vbe) of 0.9 V across its base-emitter junction at room temperature. A 0.9 V output common-mode voltage therefore will not support even a simple current source, let alone an amplifier.
FIG. 1 shows PNP differential pair 100 in the prior art, which includes current sources 101-1 and 101-2, PNP transistors Q2B and Q2D, load resistors 102-1 and 102-2 (each having resistance value R2) and resistors 103-1 and 103-2 (each having resistance value R1). The gain in PNP differential pair 100 is set by the resistance values R1 and R2. PNP differential pair 100 provides an output differential signal across terminals 104-1 and 104-2. While PNP differential pair 100 can support an output common-mode voltage near the ground reference, a lower transistor frequency (fT) and a lower common-emitter current gain (β), as compared to an NPN transistor, limit both bandwidth and linearity.
U.S. Pat. No. 4,731,588, to Addis et al., entitled “Gain Selectable Amplifier with Resonance Compensation,” issued on Mar. 15, 1988, and U.S. Pat. No. 5,307,024 to Metz et al., entitled “Linearized level-shifting amplifier,” issued on Apr. 26, 1994, disclose voltage feedback linearization techniques. However, these feedback linearization techniques are not applicable to PNP differential amplifiers when its linearity is limited by the lower current gain (β). The textbook “Analogue IC Design: The Current-mode Approach,” by C. Toumazou, F. J. Lidgey, and D. Haigh, Circuits, Devices and Systems, Peregrinus, 1993, pp. 11-21, suggests current-mode techniques which overcome this limitation.